O Level Computer Science (2210)

Hardware Banker

29 questions · about 14% of the marks we indexed · examined in 8 of 8 sessions.

Questions by year

Paper

2026 May/June · Paper 12 · Q1 (a, d)2 marksInput and output devices · Sensors and microprocessor control
2026 May/June · Paper 12 · Q2 (a, b, c, d)8 marksCPU components and the fetch-decode-execute cycle · CPU performance, cores, cache and embedded systems
2026 May/June · Paper 12 · Q3 (f(i), f(ii))3 marksPrimary, secondary, virtual and cloud storage
2026 May/June · Paper 12 · Q6 (c(i), c(ii))3 marksPrimary, secondary, virtual and cloud storage

2025 Oct/Nov · Paper 12 · Q1 (e(i), e(ii), e(iii), e(iv))7 marksCPU components and the fetch-decode-execute cycle · Input and output devices · Primary, secondary, virtual and cloud storage · Sensors and microprocessor control
2025 Oct/Nov · Paper 12 · Q4 (a, b, c)11 marksCPU components and the fetch-decode-execute cycle · CPU performance, cores, cache and embedded systems
2025 Oct/Nov · Paper 12 · Q7 (b, d, e)5 marksCPU performance, cores, cache and embedded systems · Input and output devices · Primary, secondary, virtual and cloud storage
2025 May/June · Paper 12 · Q1 (a, b)2 marksPrimary, secondary, virtual and cloud storage
2025 May/June · Paper 12 · Q2 (a)1 markInput and output devices
2025 May/June · Paper 12 · Q3 (c(i))1 markInput and output devices
2025 May/June · Paper 12 · Q4 (a, b)8 marksCPU components and the fetch-decode-execute cycle · CPU performance, cores, cache and embedded systems

2024 Oct/Nov · Paper 12 · Q4 (a, b, c, d(i), d(ii), e)13 marksCPU performance, cores, cache and embedded systems · Input and output devices · Primary, secondary, virtual and cloud storage
2024 Oct/Nov · Paper 12 · Q66 marksCPU components and the fetch-decode-execute cycle
2024 Oct/Nov · Paper 12 · Q8 (a)1 markSensors and microprocessor control
2024 May/June · Paper 12 · Q5 (a, b)8 marksCPU components and the fetch-decode-execute cycle
2024 May/June · Paper 12 · Q7 (a, b(i), b(ii))4 marksNetwork hardware and addressing (NIC, MAC, IP, router)
2024 May/June · Paper 12 · Q9 (a, b)8 marksPrimary, secondary, virtual and cloud storage

2023 Oct/Nov · Paper 12 · Q3 (a(i), a(ii), b, c)6 marksCPU components and the fetch-decode-execute cycle · CPU performance, cores, cache and embedded systems
2023 Oct/Nov · Paper 12 · Q4 (a, b)5 marksCPU performance, cores, cache and embedded systems
2023 Oct/Nov · Paper 12 · Q7 (a, b)8 marksInput and output devices · Sensors and microprocessor control
2023 Oct/Nov · Paper 12 · Q11 (a)1 markSensors and microprocessor control
2023 Oct/Nov · Paper 12 · Q13 (a(i), a(ii), b)7 marksPrimary, secondary, virtual and cloud storage
2023 May/June · Paper 12 · Q13 marksInput and output devices
2023 May/June · Paper 12 · Q4 (b(i), b(ii), b(iii))4 marksNetwork hardware and addressing (NIC, MAC, IP, router) · Primary, secondary, virtual and cloud storage
2023 May/June · Paper 12 · Q8 (a, b)5 marksNetwork hardware and addressing (NIC, MAC, IP, router)
2023 May/June · Paper 12 · Q10 (b)1 markPrimary, secondary, virtual and cloud storage

2022 Oct/Nov · Paper 12 · Q1 (a, b, c(i), c(ii), c(iii), c(iv), d)14 marksCPU components and the fetch-decode-execute cycle · Input and output devices
2022 Oct/Nov · Paper 12 · Q2 (a, b)9 marksSensors and microprocessor control
2022 Oct/Nov · Paper 12 · Q35 marksPrimary, secondary, virtual and cloud storage

Find the full paper on the official Cambridge past-papers page or ask your school. “Paper 42” means Paper 4, variant 2.

Subtopic	Marks indexed	Sessions
Primary, secondary, virtual and cloud storage Banker	46	8/8
CPU components and the fetch-decode-execute cycle Banker	37	7/8
Input and output devices Banker	25	7/8
CPU performance, cores, cache and embedded systems	22	5/8
Sensors and microprocessor control	19	5/8
Network hardware and addressing (NIC, MAC, IP, router) Rare	10	2/8